By Topic

Analogue adaptive neural network circuit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Chiang, M.L. ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Lu, T.C. ; Kuo, J.B.

Current integrated circuits realising neural networks take up too much area for implementing synapses. The authors present a one-transistor (1T) synapse circuit that uses a single MOS transistor, which is more efficient for VLSI implementation of adaptive neural networks, compared to other synapse circuits. This 1T synapse circuit can be used to implement multiply/divide/sum circuits to realise an adaptive neural network. The feasibility of using this circuit in adaptive neural networks is demonstrated by a 4-bit analogue-to-digital converter circuit, based on the Hopfield modified neural network model, with an analogue LMS adaptive feedback. DC and transient studies show that 1T synapse circuits with an analogue adaptive feedback circuit can be used more efficiently for VLSI implementation of adaptive neural networks

Published in:

Circuits, Devices and Systems, IEE Proceedings G  (Volume:138 ,  Issue: 6 )