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Switched-capacitor pipelined logarithmic A/D and D/A convertors

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2 Author(s)
Cheng, M.-H. ; Dept. of Control Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Huang, T.-C.

The authors present two switched-capacitor circuits with modest complexity to implement a pipelined logarithmic digital-analogue convertor (LDAC) and logarithmic analogue-digital convertor (LADC), respectively, which spend only one clock time per conversion. In addition, the effect of the capacitor-ratio mismatch on the conversion errors of the convertor circuits is discussed. Hence, from the available maximum capacitor-ratio value and mismatch of the present integrated circuit (IC) technology, the feasible bit length of the pipelined LDAC and LADC can be computed

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Circuits, Devices and Systems, IEE Proceedings G  (Volume:138 ,  Issue: 6 )