Cart (Loading....) | Create Account
Close category search window
 

A single-chip U-interface transceiver for ISDN

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)

The authors discuss system and implementation aspects of a 144 kbit/s one-chip U-transceiver based on echo-cancellation techniques using the MMS43 line code and a Barker synchronization word for bit and frame timing, and including a 1-kb/s transparent channel for maintenance purposes. The LSI is realized by a 2-μm CMOS, double-metal, double-poly technology shrinkable to a 1.5-μm technology and packaged in a 28-pin DIL (dual in-line) package.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:22 ,  Issue: 6 )

Date of Publication:

Dec 1987

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.