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CRISP: a pipelined 32-bit microprocessor with 13-kbit of cache memory

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7 Author(s)

The implementation and architecture of a 172, 163-transistor single-chip general-purpose 32-b microprocessor is described. The 16-MHz chip is fabricated using a single-metal double-poly 1.75-μm CMOS technology and is capable of a peak execution rate of over one instruction/clock. Multiple on-chip catches, pipelining, and a one-cycle I/O protocol are utilized.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:22 ,  Issue: 5 )