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The basic structure is based on merging three devices in an area of a single MOS transistor. It uses an MOS capacitor and bipolar and JFET transistors for storage, writing, and sensing, respectively. These circuit structures have significantly smaller area and faster speed of operation compared to the conventional dynamic logic and memory circuits. In dynamic serial memory, the area of the circuit structure is approximately 35% that of the conventional circuit. The circuit structures also do not suffer from the common problem of charge redistribution.