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FEBRIS: a chip for pattern recognition

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4 Author(s)

A chip that performs and evaluates a 16×16-pixel comparison for application in pattern recognition systems is described. The on-chip data organization and the Wallace-tree evaluation circuits are described. The chip has been realized in a 2-μm NMOS process and operated at 18 MHz, thus performing four gigapixel operations per second.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:22 ,  Issue: 3 )