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An 8-bit high-speed CMOS A/D converter

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6 Author(s)

An 8-bit high-speed A/D converter has been developed in a 1.5-μm bulk CMOS double-polysilicon process technology. The design, process technology, and performance of the converter are described. In order to achieve high speed and low power, a fine-pattern process technology and a novel capacitor structure have been introduced and the transistor sizes of a chopper-type comparator have been optimized. High speed (30 MS/s) and low power consumption (60 mW) have been obtained. Computerized evaluations such as the histogram test and the fast Fourier transform test have been used to measure dynamic performance. The linearity error in dynamic operation is less than ±1 LSB. Signal-to-peak-noise ratio is 40 dB at a sampling rate of 14.32 MS/s and an input frequency of 1.42 MHz.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:21 ,  Issue: 6 )