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A method of cyclic analog-to-digital (A/D) and digital-to-analog (D/A) conversion using switched-capacitor techniques is described. By periodically modifying the reference voltage to compensate for the nonideal signal-transfer-loop gain, it is possible in principle to build A/D and D/A converters whose linearity is independent of component ratios and that occupy only a small die area. These converters require two moderate-gain MOS operational amplifiers, one comparator, and a few capacitors. A test chip for A/D conversion was built and evaluated. The test data show that the A/D performs as a monotonic 13-bit converter with maximum 1-LSB differential and 2-LSB integral nonlinearity.