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A Design Strategy in CMOS for Microprocessors and Its Application to the Intel 80C48

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1 Author(s)

The main purpose in redesigning the 8048 Intel Microcomputer in CMOS technology is to test our tool's efficiency and to evaluate our design methodology, called CAPRI [1], which researches a good factor of regularity. This paper presents a method of implementing microprocessor circuitry in CMOS which uses an ordered stucture of the layout. It allows the designer to work, with a symbolism, on a grid made of polysilicon rows and aluminium columns. Thus, data buses runs in polysilicon lines which seem to give a handicap to this method. Nevertheless, calculations show an acceptable propagation delay time of 46 ns for a 2.5-mm bus (31 ns in the case of an equivalent aluminium bus).

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:20 ,  Issue: 3 )

Date of Publication:

June 1985

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