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A VLSI VAX chip set

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3 Author(s)

VLSI technology has been used to compress the full functionality and comparable performance of the WAX 11/780 super-minicomputer into a 1.2 M transistor microprocessor chip set. There was no subsetting of the 304 instruction set and the 17 data types, nor reduction in hardware support for the 4 Gbyte virtual memory management architecture. The chip set supports an integral 8-Kbyte memory cache, a 13.3-Mbyte/s system bus, and sophisticated multiprocessing. High performance is achieved through microcode optimizations afforded by the large control store, tightly coupled address and data caches, the use of internal and external 32-bit datapaths, the extensive application of both microlevel and macrolevel pipelining, and the use of specialized hardware assists.

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Solid-State Circuits, IEEE Journal of  (Volume:19 ,  Issue: 5 )