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A monolithic 64 bit floating-point coprocessor

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2 Author(s)

A double/single-precision floating-point processor using a titanium disilicide 3.5-/spl mu/m NMOS process achieves double-precision add/subtract, multiply, and divide in 2, 8, and 16 /spl mu/s respectively. The chip has about 35K devices and is about 400 mil on the side. The chip uses a single 5-V supply with TTL-compatible levels on all signals except for the clocks, which require 4.5 V for a logic high. Four input clocks are used to generate eight 50-ns intervals. A -2.5 V substrate bias generator is designed on the chip but uses a pin for an external capacitor. The processor, which is to be used in a desktop implementation of a minicomputer, executes the floating-point instruction set for the micro-Eclipse computer.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:19 ,  Issue: 4 )