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A 333 ps/800 MHz 7 K-gate bipolar macrocell array employing 4 level metallization

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2 Author(s)

An ECL100K-compatible, bipolar, subnanosecond macrocell array has been developed. A new macrocell structure is proposed, using a 2-/spl mu/m design rule and four-level metallization SST-2 process. A basic macrocell consisting of 10 transistors and 12 resistors is formed by the stretched Pt-Si patterns for the electrodes of base and resistor. The basic circuit structure is a two-level series-gated ECL circuit with emitter-follower output. The high performance of the 333 ps/cell and an 800-MHz toggle frequency of a master-slave flip-flop were achieved using a 0.2-mA switching current. The gate count of the chip is equivalent to 6.8 to 8.3K gates.

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Solid-State Circuits, IEEE Journal of  (Volume:19 ,  Issue: 4 )