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The authors describe a 2-/spl mu/m NMOS single-chip processor which computes a 256-point Fourier transform in 6.5 ms by means of the DFT algorithm. This chip is primarily intended for speech processing applications such as voice recognizers, pitch extractors, and DFT vocoders. The DFT algorithm has been implemented wih two parallel multipliers, an accumulator/shifter and two ROMs with separate address computation units. The processor contains over 20,000 transistors and dissipates ~400 mW when operating at a clock frequency of 10 MHz. The die size is only 12.5 mm/SUP 2/ as a result of the use of a full-custom design method and the incorporation of low-resistance implanted As/SUP +/ undercrossings within the logic circuitry.