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Control logic and cell design for a 4K NVRAM

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5 Author(s)

A high-density 4K 5-V-only nonvolatile static RAM has been designed using a wafer stepper HMOS I FLOTOX E/SUP 2/PROM technology. Normal SRAM read/write operations and parallel data transfer between SRAM and E/SUP 2/PROM array are possible. On-chip high-voltage regulation and generation, junction leakage control, and self-timing circuitry ensure full military temperature operation. Power-down store lockout protection and power-up automatic recall are featured.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:18 ,  Issue: 5 )