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A Single Chip Speech Synthesizer Using a Switched-Capacitor Multiplier

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2 Author(s)

A single chip speech synthesizer was designed using a switched-capacitor multiplier to implement the LPC algorithm. The chip contains the LPC-10 filter, 20 kbit ROM, all control logic, a three-pole switched-capacitor low-pass filter, and an audio amplifier capable of driving a speaker directly. The chip was fabricated in 5 µm CMOS technology and is 218 mils on the side.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:18 ,  Issue: 1 )