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The voltage swing and the low-current-level static groundline voltage noise margins of integrated Schottky logic (ISL) Schottky transistor logic (STL) as a function of temperature and fan-out, are derived analytically for gates with and without an internal pull-up current. At high voltage levels where series resistances play an important role, the voltage swings and noise margins are obtained by computer simulations. Depending on the current per gate, it appears that STL can have better noise margins than ISL at high temperature when their logic swings are equal at room temperature and when no pull-up currents are applied. With pull-up currents, this difference decreases dramatically and reasonable noise margins at high fan-outs can be obtained over a large temperature range. The analytical calculations and computer simulations are verified by measurements.