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A GaAs 4 bit arithmetic and logic unit (ALU) has been fabricated using a planar ion implantation technique with 2 /spl mu/m gate length FETs. The basic circuit is a buffered FET logic (BFL) circuit composed of normally on GaAs MESFETs and Schottky diodes. The active layers of the FETs and diodes are made by implanting Si into Cr-doped semi-insulating GaAs substrate. This ALU contains 629 FETs and 225 diodes within an area of 1.6/spl times/2.1 mm/SUP 2/. The ALU, capable of driving 50 /spl Omega/ transmission lines, is mounted on a 24 lead flat package. A delay time of 2.1 ns through the data path and a total power dissipation of 1.2 W with supply voltages of +5 V and -3 V have been obtained.
Date of Publication: Aug. 1982