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The design and performance of a fast 1 X 1K bit static silicon MESFET shift register is presented. The shift register is fully compatible with emitter-coupled logic (ECL) and has on-chip clock drivers. The architecture of the shift register and the designs of the functional blocks are discussed. The overall performance of the shift register is estimated from the simulated performances of the functional blocks and from system simulations with a logic simulator. The experimental 1 X 1K bit static shift register operated up to 140 MHz with a total power consumption of 0.3 W. Simulations predict up to 500-MHz operation at 1.2 W.
Date of Publication: Apr 1982