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With the advent of 2- and 1-μm VLSI silicon technologies, evaluation of the threshold, density, power, speed, circuit margins, punchthrough, and breakdown requires three-dimensional simulations. This paper describes a computer simulation program based on a three-dimensional model for small-geometry MOSFET's. The effect of Si-SiO2 interface charge, ion implantation in the channel, p+ isolation field ion implant (channel isolations), and shape of the field oxide are all included in the model. Our three-dimensional simulations revealed a new insight into VLSI MOSFET devices. Some of these results include "wedge-like" effective channel width, the effective channel width under certain bias conditions decreases to 63 percent of its nominal value. Saddle point related to punchthrough current locus; the punchthrough current per unit width as a function of the channel width was found for the first time to decrease rapidly as the channel width was reduced below 5 μm. A decrease of punchthrough current by three orders of magnitude was observed as the channel width was reduced from 2 to 1 μm. The break-down voltage of small-geometry devices increases as the channel width decreases. Subthreshold current, potential and electric field distributions, and threshold voltage are significantly different from those calculated using two-dimensional analysis. This simulation program can be used for design of small-geometry MOSFET's and estimation of small-geometry effects in submicrometer size devices, It can be used to evaluate new VLSI and VHSIC technologies. Finally it can be used to test simple models for use with CAD programs.