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A 1-/spl mu/m Mo-Poly 64-Kbit MOS RAM

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6 Author(s)

This paper describes a 1-m 64-kbit MOS RAM using Mo-poly technology. New 1-/spl mu/ m double-gate technology using molybdenum and polysilicon (Mo-poly technology) is proposed. In this technology, molybdenum and polysilicon are used for word lines and storage capacitor electrodes in the memory cell, respectively. Therefore, the propagation delay in a word line becomes extremely small and memory cell size is reduced. New two step annealing was developed for stabilizing an Mo-gate MOS structure. Design is optimized for 1-/spl mu/ m Si-gate FET's in peripheral circuitry. A 1-/spl mu/ m Mo-poly 64-kbit MOS RAM was experimentally fabricated by using 1/spl mu/ m process technologies. The cell size and die size were 8 /spl mu/ m X 8 /spl mu/ m and 3 mm X 3 mm, respectively. Access time was less than 100 ns.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:15 ,  Issue: 4 )

Date of Publication:

Aug. 1980

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