Skip to Main Content
A study of the refractory-gate metallization schemes had been undertaken to provide a low-resistivity metallization for LSI and VLSI. In this paper, we describe an overview of the efforts made in this direction and present two different metallization schemes which lead to a resistivity of <=20 and 40 /spl mu//spl Omega/spl dot/cm at the gate level. These schemes involve formation of titanium and tantalum silicides on polysilicon gates, respectively. The recommended structure ia a metal or a cosputtered alloy/polysilicon/gate oxide/substrate which, when sintered, gives the desired structure silicide/polysilicon/gate oxide substrate. By the use of 1000-/spl aring/ Ti or Ta, the sheet resistance of nearly 1 or 2 Omega//spl square/, respectively, can be routinely obtained. The silicides are mechanically strong and can be dry etched using radial-flow or barrel-type plasma reactors. The Ta silicide structure is found to be very stable throughout standard processing and can be retrofitted in the present processing sequence. Ti silicide structures are similarly stable except for the reactivity of the silicide with HF-containing reagents. The Ti silicide metallization scheme can therefore be employed in processing with changes incorporated to avoid HF-silicide contact.