Referenced Items are not available for this document.
A new successive approximation analog-to-digital conversion technique compatible with most MOS process technologies is described. This technique combines a string of equal value diffused resistors and a binary ratioed capacitor array in a unique circuit configuration so that 12-bit monotonicity is achieved with only 8-bit ratio-accurate circuit elements. The comparator is realized by a chopper-stabilized amplifier to reduce the inherently high input offset voltages of MOS amplifiers. Typical performance characteristics taken from a sample of ICs are presented; 12-bit monotonic conversion with differential nonlinearity less than 1/2 LSB is completed in 50 μs. The die area, less logic, is 12000 mil/SUP 2/. Because of assured 12-bit monotonicity, this converter should find applications of closed-loop control systems. It seems feasible to extend this technique to 14-bit resolution for use in applications such as digital audio systems.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:14
,
Issue:
6
)
Date of Publication: Dec 1979
- Page(s):
- 920 - 926
- ISSN :
- 0018-9200
- Digital Object Identifier :
- 10.1109/JSSC.1979.1051298
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 January 2003
- Issue Date :
- Dec 1979
- Sponsored by :
- IEEE Solid-State Circuits Society
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