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A 64Kx1 bit dynamic ED-MOS RAM

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6 Author(s)

A 64K/spl times/1 bit dynamic RAM based on an innovative short channel ED-MOS process technology and an improved ED-MOS sense amplifier circuit has been realized. The RAM has been designed by using 2-3 /spl mu/m design rules and employing ED-MOS peripheral circuits capable of low supply voltage operation. As a result, dynamic memory operation has been demonstrated with an access time less than 140 ns and a cycle time of 350 ns, using a single 5 V power supply.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:13 ,  Issue: 5 )