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A 512-b dynamic shift register is integrated on 6.4-mm/SUP 2/ active chip area. The frequency range is from 100 Hz to 3 MHz. At 1 MHz the power dissipation is 20 mW. The performance of the shift register is insensitive to spread in process parameters because the information is regenerated in each cell. The comparison of the measured and the calculated working range shows the essential influence of all parasitic capacitances.