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Low-power bipolar transistor memory cells

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6 Author(s)

Low- and high-barrier Schottky diodes have been combined with bipolar transistors to produce planar integrated-circuit low-area memory cells that hold at 75 μW. Low-barrier diodes formed on p-type ion-implanted silicon (10/SUP 17/ cm/SUP -3/) are used as high-resistance collector loads. High-barrier diodes formed on n-type epitaxial silicon (10/SUP 16/ cm/SUP -3/) provide low-capacitance low-leakage coupling to digit lines in a memory array. The highly reproducible rhodium silicide on silicon Schottky diodes, as well as high-quality ohmic contacts, are formed in one sequence of sputtering and high-temperature operations. The process is fully compatible with beam-lead technology. It is estimated that a 512-word memory module using these cells would operate at a 60-ns READ or WRITE cycle time.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:4 ,  Issue: 5 )

Date of Publication:

Oct 1969

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