Referenced Items are not available for this document.
The ECCSL arrays have been successfully fabricated using two levels of metalization on 120 by 120-mil chips. The yield, fabrication, and performance studies of these arrays, while not yet complete, indicate that current mode logic arrays of 10 to 30 gates are entirely feasible. This is especially true if the size of the chips are reduced as much as possible (preferably below 0.10 by 0.10 inch.) Indications are that arrays with relatively low gate counts (10 to 30 gates) greatly reduce the testing problems usually associated with array technology.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:4
,
Issue:
1
)
Date of Publication: Feb. 1969
- Page(s):
- 13 - 16
- ISSN :
- 0018-9200
- Digital Object Identifier :
- 10.1109/JSSC.1969.1049947
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 January 2003
- Issue Date :
- Feb. 1969
- Sponsored by :
- IEEE Solid-State Circuits Society
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