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Parallel architecture for video processing in a smart camera system

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3 Author(s)
T. Lv ; Dept. of Electr. Eng., Princeton Univ., NJ, USA ; B. Ozer ; W. Wolf

In this paper, we present our research on parallel architectures for a smart camera system. We analyze the available data independencies for a particular application, namely human detection and activity recognition, and discuss the potential architectures to exploit the parallelism resulted from these independencies. Three architectures-VLIW, symmetric parallel, and macro-pipeline architectures-are discussed and their performances are presented.

Published in:

Signal Processing Systems, 2002. (SIPS '02). IEEE Workshop on

Date of Conference:

16-18 Oct. 2002