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Nonmonotone norm-reduction method for circuit simulation

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1 Author(s)
Honkala, M. ; Circuit Theor. Lab., Helsinki Univ. of Technol., Finland

A nonmonotone norm-reduction method for aiding the convergence of Newton-Raphson iteration is presented. The simulation results with some benchmark circuits show that a nonmonotone norm-reduction method may reduce the number of line searches during the iteration.

Published in:

Electronics Letters  (Volume:38 ,  Issue: 22 )