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Charge-pump circuits: power-consumption optimization

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3 Author(s)
Palumbo, G. ; Dipt. Elettrico Elettronico e Sistemistico, Catania Univ., Italy ; Pappalardo, D. ; Gaibotti, M.

In this paper, an optimized strategy for designing charge pumps with minimum power consumption is presented. The approach allows designers to define the number of stages that, for a given input, and an output voltage, maximize power efficiency. Capacitor value is then set to provide the current capability required. This approach was analytically developed and validated through simulations and experimental measurements on 0.35-μm EEPROM CMOS technology. This approach was then compared with one which minimized the silicon area and it was shown that only a small increase in area is needed to minimize power consumption.

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Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on  (Volume:49 ,  Issue: 11 )