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A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic

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5 Author(s)
Berg, Y. ; Dept. of Inf., Oslo Univ., Norway ; Naess, O. ; Aunet, S. ; Lomsdalen, J.
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In this paper, we present a novel floating-gate binary to multiple-valued converter for use in multiple-valued (MV) digital CMOS design. Techniques for reducing power supply noise are addressed and a binary to 4 bit (radix 16) MV converter is discussed. The converter has been sent for fabrication and measured results should be available. Simulation results obtained from Matlab and SpectreS are presented.

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Electronics, Circuits and Systems, 2002. 9th International Conference on  (Volume:2 )

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