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Retrofitted with new, albeit unconventional, submicron-specific analog/power technologies, mid-to-deep submicron DRAM fab reuse offers significant and unexpected benefits in the performance, die size, and cost of analog mixed signal & power management ICs. New and novel devices and techniques including full-junction isolation without epitaxy, MeV chained-implant (CIJI) sidewall isolation, reduced lateral spacing (constrained implants and diffusions), hyper-accurate as-implanted DMOS channels, and new families of non-planar and trench-gated devices are now (for the first time) possible. A novel 0.35-μm epi-less ModularBCD process technology integrating fully-isolated CMOS; complementary bipolars; avalanche-capable lateral TrenchDMOS with independently optimized 5 V, 12 V and 30 V device arsenals is introduced. Building blocks including ultra-miniature (SC70-sized) 300 mA LDOs, 1-μsec (fast) current limiters, fast (10-MHz) fully-buffered power half-bridges (and more) exemplify the significant (and potentially revolutionary) size and performance gains of a submicron-specific analog/power technology approach to DRAM fab reuse.