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Software caching using dynamic binary rewriting for embedded devices

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3 Author(s)
C. M. Huneycutt ; Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA, USA ; J. B. Fryman ; K. M. Mackenzie

A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss time. We describe a software cache system implemented using dynamic binary rewriting and observe that the combination is particularly appropriate for the scenario of a simple embedded system connected to a more powerful server over a network. As two examples, consider a network of sensors with local processing or cell phones connected to cell towers. We describe two software cache systems for instruction caching only using dynamic binary rewriting and present results for the performance of instruction caching in these systems. We measure time overheads of 19% compared to no caching. We also show that we can guarantee a 100% hit rate for codes that fit in the cache. For comparison, we estimate that a comparable hardware cache would have space overhead of 12-18% for its tag array and would offer no hit rate guarantee.

Published in:

Parallel Processing, 2002. Proceedings. International Conference on

Date of Conference:

2002