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An integrated CMOS PLL for low-jitter applications

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4 Author(s)
Herzel, F. ; IHP, Frankfurt, Germany ; Fischer, G. ; Gustat, H. ; Weger, P.

This brief presents a fully integrated integer-N frequency synthesizer with a frequency-tuning range from 2.4 to 2.9 GHz and root-mean-square (rms) jitter below 2.5 ps over 350 MHz. The employed architecture using an inductance-capacitance (L-C) oscillator with two control inputs combines a wide tuning range with a low noise sensitivity. Potential applications include clock generation in microprocessors and clock recovery in fiberoptic receivers.

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Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on  (Volume:49 ,  Issue: 6 )