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48 Gbit/s InP DHBT MS-DFF with very low time jitter

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5 Author(s)
Konczykowska, A. ; OPTO+, Alcatel R&I, Marcoussis, France ; Jorge, E. ; Kasbari, A. ; Sahri, N.
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A master-slave D-type flip-flop (MS DFF) fabricated in a self-aligned InP DHBT technology is presented. The packaged circuit shows full-rate clock operation at 48 Gbit/s. Very low time jitter and good retiming capabilities are observed. Layout aspects, packaging and measurement issues are discussed in particular

Published in:

Electronics Letters  (Volume:38 ,  Issue: 19 )