Referenced Items are not available for this document.
A low-power quadrature direct digital frequency synthesizer (DDFS) is presented. Piecewise linear approximation is used to avoid using a ROM look-up table to store the sine values as in a conventional DDFS. Significant saving in power consumption, due to the elimination of the ROM, renders the design more suitable for portable wireless communication applications. To demonstrate the proposed technique, a quadrature DDFS has been implemented using 0.5-μm CMOS process and occupies an active area of 1.4 mm2. It consumes 8 mW at 100 MHz and operates from a single 2.7-V supply. The spurious-free dynamic range is better than 59 dBc at low synthesized frequencies and the frequency resolution is 1.5 kHz.
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:37
,
Issue:
10
)
Date of Publication: Oct 2002
- Page(s):
- 1235 - 1243
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 7416042
- Digital Object Identifier :
- 10.1109/JSSC.2002.803008
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 07 November 2002
- Issue Date :
- Oct 2002
- Sponsored by :
- IEEE Solid-State Circuits Society
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