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Leakage and process variation effects in current testing on future CMOS circuits

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8 Author(s)
Keshavarzi, A. ; Microprocessor Res. Labs., Intel Corp., Portland, OR, USA ; Tschanz, J.W. ; Narendra, S. ; De, V.
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Barriers to technology scaling, such as leakage and parameter variations, challenge the effectiveness of current-based test techniques. This correlative multiparameter test approach improves current testing sensitivity, exploiting dependencies of transistor and circuit leakage on operating frequency, temperature, and body bias to discriminate fast but intrinsically leaky ICs from defective ones

Published in:

Design & Test of Computers, IEEE  (Volume:19 ,  Issue: 5 )