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Due to the short test time and high fault coverage, march algorithms have been widely used to test the SRAM and DRAM memory chips and cores in a system-on-chip (SOC). To raise the fault coverage of the word-oriented memories (WOMs), distinct data backgrounds of the march algorithms are required. In this paper we have integrated two kinds of data background generators into a single design in the built-in self-test (BIST) environment. The proposed data background generator can generate different sizes and different kinds of data backgrounds for testing the WOMs. It is shown that the design is easily programmable with very little external control. Also when combined with the existing data register in the memory, the hardware overhead is quite small.