By Topic

An EHW architecture for real-time GPS attitude determination based on parallel genetic algorithm

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Jiangning Xu ; Dept. of Electr. Eng., Edinburgh Univ., UK ; T. Arslan ; Qing Wang ; Dejun Wan

The paper describes a parallel genetic algorithm for the VLSI implementation of real-time GPS attitude determination systems. The genetic algorithm is based on a fine-grained model and utilises AFM (Ambiguity Function Method) for GPS attitude determination. The paper describes various implementation choices for the genetic algorithm in order to achieve both functionality and practical performance constraints such as speed, compactness and scalability. Simulation results using GPS carrier phase experimental data show that, in addition to low hardware complexity, our final genetic algorithm architecture achieves a linear speed-up with the number of processors utilised in the target VLSI chip.

Published in:

Evolvable Hardware, 2002. Proceedings. NASA/DoD Conference on

Date of Conference: