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In this work, we report the fabrication of high performance thin-film transistors (TFTs) down to sub-100 nm regime using Pattern-controlled crystallization of Thin channel layer and High temperature annealing (PaTH). High temperature is used to improve the film quality. Thin body thickness (Tsi) is used to suppress the short channel effects. The devices showed superior switching properties and device-to-device uniformity over conventional poly-Si TFTs.
Date of Conference: 24-26 June 2002