By Topic

Feasibility of 50-nm device manufacture by 157-nm optical lithography: an initial assessment

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Pong Wing Tai ; Dept. of Electr. & Electron. Eng., Univ. of Hong Kong, China ; A. Wong

The normalized process latitude (NPL) is used to assess the feasibility of 50-nm device manufacture by 157-nm optical lithography. A first NPL quantification assuming steady improvement of processing technology shows that 157-nm optical lithography is infeasible. A second NPL quantification investigates the amount of technology acceleration required to make 50-nm manufacture possible. It is concluded that photolithography is a viable lithography technique for the 50-nm technology generation only with significant improvements in focus control, photomask making, photoresist contrast, as well as aberration levels.

Published in:

Electron Devices Meeting, 2002. Proceedings. 2002 IEEE Hong Kong

Date of Conference: