Close category search window
 

The fringing electric field effect on the short-channel effect threshold voltage of FD SOI NMOS devices with LDD/sidewall oxide spacer structure

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Kuo, J.B. ; Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada ; Shih-Chia Lin

This paper presents the fringing electric field effect on the short-channel effect threshold voltage of fully-depleted (FD) SOI NMOS devices with the lightly-doped drain (LDD)/sidewall oxide spacer structure. It is based on a closed-form analytical model derived from the 2D Poisson's equation and using the conformal mapping technique. Based on the analytical model, as verified by the experimental data and the 2D simulation results, with a lower n-LDD doping density, the fringing electric field effect in the sidewall oxide spacer lowers the short-channel effect.

Published in:
Electron Devices Meeting, 2002. Proceedings. 2002 IEEE Hong Kong

Date of Conference: 2002

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.