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Extraction of parallel hardware during C to VHDL translation

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2 Author(s)
Jie Chen ; Dept. of Electr. & Comput. Eng., Tennessee Technol. Univ., Cookeville, TN, USA ; Haggard, R.L.

Translating C/C++ language into VHDL is an important step in synthesizing hardware from C/C++. However, there is no explicit facility in the general C/C++ language to declare concurrent parallel execution which is a critical characteristic of hardware systems. This paper presents the outline of a set of transformation algorithms. These algorithms are helpful in the process of extracting parallel hardware during C to VHDL translation. An example of extracting parallel hardware from an array addition routine written in C is also presented in this paper.

Published in:

System Theory, 2002. Proceedings of the Thirty-Fourth Southeastern Symposium on

Date of Conference:

2002