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A subnanosecond Josephson 16-bit ALU

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4 Author(s)
S. Kotani ; Fujitsu Ltd., Atsugi, Japan ; N. Fujimaki ; T. Imamura ; S. Hasuo

The design and characteristics of a Nb based Josephson 16-bit arithmetic logic unit (ALU) for use as a major component of a practical Josephson microprocessor are discussed. The ALU has 900 gates and uses dual-rail logic to perform 12 functions. One of the simplest algorithms, the ripple-carry method, is used. Experiments confirmed that ALU functions operated correctly. The critical path delay time was 860 ps for a 10.1-mW power dissipation. Average values estimated from experiments are 9.2 ps for the gate delay and 113 μW for the gate power dissipation. The results demonstrate that development of a Josephson microprocessor is feasible

Published in:

IEEE Journal of Solid-State Circuits  (Volume:23 ,  Issue: 2 )