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Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product

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8 Author(s)
I-Cheng Lin ; Technol. Dev. Div., Winbond Electron. Corp., Hsinchu, Taiwan ; Chih-Yao Huang ; Chuan-Jane Chao ; Ming-Dou Ker
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Latchup failure induced by ESD protection circuits occurred in a high-voltage IC product. Latchup occurred anomalously at only several output pins. All output pins have nearly identical layouts except the side output pin has a N-well resistor of RC gate-coupled PMOS beside. It was later found this N-well resistor is the main cause of inducing latchup.

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Physical and Failure Analysis of Integrated Circuits, 2002. IPFA 2002. Proceedings of the 9th International Symposium on the

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