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Simple and accurate technique for extracting the parasitic resistances of the dual-gate GaAs MESFET

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3 Author(s)
Ibrahim, M. ; Carleton Univ., Ottawa, Ont., Canada ; Syrett, B. ; Bennett, J.

A procedure to extract the extrinsic resistances of the dual-gate GaAs MESFET (DGFET) is described. Six dc measurement setups are used to generate nine independent relations from which all the unknown extrinsic resistances of the DGFET are extracted. The described technique distinguishes between the forward bias and the nonforward bias values of the channel resistance. The extrinsic resistances of 29 devices with different topologies are determined using the developed technique. The extracted resistances follow normal scaling rules versus gate width. The developed procedure is a practical and accurate approach to extract the extrinsic resistances of the DGFET.

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Microwave and Wireless Components Letters, IEEE  (Volume:12 ,  Issue: 8 )