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Germanium MOS capacitors incorporating ultrathin high-/spl kappa/ gate dielectric

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5 Author(s)
On Chui, Chi ; Dept. of Electr. Eng., Stanford Univ., CA, USA ; Ramanathan, Shriram ; Triplett, Baylor B. ; McIntyre, Paul C.
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For the first time, we have successfully demonstrated the feasibility of integrating a high-permittivity (/spl kappa/) gate dielectric material zirconium oxide into the MOS capacitors fabricated on pure germanium substrates. The entire fabrication process was essentially performed at room temperature with the exception of a 410/spl deg/C forming gas anneal. After processing steps intended to remove the germanium native oxide interlayer between the zirconium oxide dielectric and germanium substrate, an excellent capacitance-based equivalent SiO/sub 2/ thickness (EOT) on the order of 5-8 /spl Aring/ and capacitance-voltage (C-V) characteristics with hysteresis of 16 mV have been achieved. Additionally, excellent device yield and uniformity were possible using this low thermal budget process.

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Electron Device Letters, IEEE  (Volume:23 ,  Issue: 8 )