An integrated seven bit time-to-digital converter (TDC) based on tapped CMOS delay lines was designed and tested. Its single-shot resolution is about 700 ps, and the ultimate resolution of averaged results is 50-100 ps. The linearity and gain of the converter are markedly dependent on the layout and ambient conditions
Published in:
Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on
Date of Conference: 14-16 Aug 1989