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Using formal specifications for functional validation of hardware designs

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2 Author(s)
Shimizu, K. ; Stanford Univ., CA, USA ; Dill, D.L.

Formal specifications can help resolve both ambiguity issues and correctness problems in verifying complex hardware designs. This new methodology shows how specifications can also help design productivity by automating many procedures that are now done manually. Input sequences, output assertions, and a simulation coverage metric for the design under verification are all generated directly from the specification

Published in:

Design & Test of Computers, IEEE  (Volume:19 ,  Issue: 4 )

Date of Publication:

Jul/Aug 2002

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