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This paper presents a 1.8 V 400 mA multi-mode low dropout voltage regulator designed in a 0.25 /spl mu/m CMOS process. Multiple power modes are used to increase the efficiency of the regulator under both heavy and light loads. Under heavy loads, a high power driver with dynamic current bias and a DC/DC converter are used to improve the efficiency from 50% to 75%. Under light loads, a low power driver is used to improve the efficiency from 0.2% to 43.5%.
Date of Conference: 13-15 June 2002