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A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35-/spl mu/m CMOS process

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3 Author(s)
Wong, J.M.C. ; Dept. of Electr. & Electron. Eng., Hong-Kong Univ. of Sci. & Technol., Kowloon, China ; Cheung, V.S.L. ; Luong, H.C.

A 1-V high-speed dynamic frequency divider using a common-gate topology is proposed. A simple and accurate small-signal analysis model is provided to estimate the operating frequencies. Implemented in a standard 0.35-/spl mu/m digital CMOS process and at 1-V supply, the proposed frequency divider measures an operating frequency up to 5.2 GHz at a power consumption of 2.5 mW.

Published in:

VLSI Circuits Digest of Technical Papers, 2002. Symposium on

Date of Conference:

13-15 June 2002